Huawei Unveils Tau Scaling Law, Rewriting Chip Rules
Chinese technology giant Huawei has officially unveiled the Tau (τ) Scaling Law, a new semiconductor development framework that proposes replacing the decades-old Moore’s Law paradigm with a “time scaling” approach. Presented at the IEEE International Symposium on Circuits and Systems (ISCAS) in Shanghai on May 25, the framework signals Huawei’s ambition to reshape the global semiconductor landscape amid ongoing technology competition.
A New Paradigm for Chip Evolution
For more than five decades, Moore’s Law — the observation that the number of transistors on a microchip doubles approximately every two years — has served as the guiding principle for the semiconductor industry. However, as silicon-based process nodes approach sub-nanometer scales, the industry faces mounting physical and economic barriers, including quantum tunneling effects and soaring fabrication costs.
According to Xinhua News, Huawei’s Tau Law proposes replacing traditional “geometric scaling” — the shrinking of transistor physical dimensions — with “time (τ) scaling,” which focuses on systematically reducing signal propagation delay, represented by the Greek letter τ (tau).
He Tingbo (何庭波), Huawei board member and president of the Semiconductor Business Department, delivered the keynote address. Often referred to as Huawei’s “Chip Empress,” she detailed how the Tau Law establishes a four-level co-optimization framework spanning devices, circuits, chips, and systems.
LogicFolding and Multi-Level Innovation
At the heart of the Tau Law is a novel architecture called LogicFolding, which breaks the physical boundaries of traditional planar circuit layouts by “folding” logic circuits into multiple layers. This approach significantly shortens critical-path wiring and reduces resistive and capacitive load, enabling higher transistor density without relying solely on lithographic scaling.
As Huawei’s official press release explains, the multi-level mechanism includes optimizing transistor resistance and parasitic capacitance at the device level, adopting LogicFolding at the circuit level, employing full-stack software-architecture-silicon co-design at the chip level, and introducing the UnifiedBus interconnect protocol at the system level to reduce communication latency.
“The future belongs to openness and collaboration,” He Tingbo said during her keynote. “No single company can independently find all the answers along the path of semiconductor evolution.”
Proven Track Record and Roadmap
Crucially, the Tau Law is not a theoretical concept. He Tingbo disclosed that Huawei has already designed and mass-produced 381 chips based on this framework over the past six years, serving diverse industries from consumer electronics to enterprise computing.
The upcoming Kirin 2026 chip, scheduled for launch in Fall 2026, will be the first to adopt the LogicFolding architecture, evolving from single-layer to double-layer logic for a significant performance leap. Looking further ahead, Huawei projects that by 2031, its high-end chips designed under the Tau Law will achieve transistor density equivalent to 1.4nm (14 Å) processes.
Market and Industry Reaction
The announcement triggered an immediate surge in China’s A-share semiconductor stocks on May 25. Dongxin Co., Huahong Company, and Yongxi Electronics all hit the 20% daily limit up, while SMIC, Shengmei Shanghai, and others rose over 10%, according to Xinhua.
Miao Fuyou, CTO of the Global Computing Alliance Secretariat, endorsed the law’s innovation, noting that inter-module communication latency has become the primary bottleneck in high-performance computing. He described the Tau Law as breaking “traditional system limitations” by integrating architecture innovation, Chiplet technology, and advanced stacking.
Challenges and Open Questions
Despite the bold claims, significant questions remain. The Tau Law has not yet been independently verified by academic or industry third parties, and its heavy reliance on Huawei’s massive R&D investment means most domestic companies cannot quickly replicate the approach. Additionally, the framework currently lacks standardized, universally accepted metrics.
As Yicai Global reported, industry analysts acknowledge that while the Tau Law provides a “new feasible path” for Chinese chip designers to circumvent advanced process node restrictions, the semiconductor industry’s upgrade path remains challenging.
What’s Next
Huawei’s Tau Law positions the company as a potential rule-maker in semiconductor evolution, challenging the industry to rethink how chip performance is measured and advanced. The coming months will be critical as the Kirin 2026 chip with LogicFolding hits the market, and as international standards bodies like IEEE and JEDEC evaluate whether to adopt elements of the Tau framework.
For now, Huawei has made one thing clear: in an industry long governed by Moore’s Law, a new contender for the throne has emerged.